Hi eerocketman,
This schematic consists of a two stage amplifier U8A and U8B and a squaring circuit U11.
You should try to see the circuit from another perspective: consider +5V as it is 2.5V, GND as it is -2.5V and VREF as it is 0V.
Both the amplifiers have an high pass input filter (@ around 41KHz) and a low pass filter (@ around 38KHz). The first stage is non inverting and the second is inverting.
There is an additional high pass filter (C30+R17 and C31+R18) that basically blocks all the dc components at the comparators inputs. The comparators output are paralleled (these are open-drain outputs) and pulled up by R19. When the second stage output signal exceed ~VREF+28mV or is lower than ~VREF-29mV the comparator output goes low.
To be clearer I've attached the schematic with a few comment. I have not performed a simulation but if you need it just ask.
Hope this help.
Best,
0xfede