Two whys:
1. Why asymmetrical stackup?
2. Why slot a ground? What's around it, will anything cross the gap, are you really improving the design by increasing ground impedance?
Slotted grounds create many more problems than they solve. Thus, very many questions are worth asking, and answering, before using the process.
Note this doesn't mean they can't be used ever, the point is, if you don't know what you're doing... you're 99.9% better off just not doing it, pour everything and be good.
From my own experience, out of dozens of designs on my CV, there's been... maybe one? One design, that I could at least hand-wavingly justify having added a slot to; and even then, I'm almost certain it didn't make any difference in the particular design. If I did more analog, low noise / sensitive, etc. projects, maybe I'd have a few more, but mostly, it can be designed around with more careful placement and routing, and that's that.
More importantly: what's around? Where are signal and ground currents flowing? Why can't you solve those ground-return paths by improving component and trace placement? Is there a mechanical restriction forcing this (otherwise-, or potentially-) suboptimal design approach?
Keep in mind, the fringing field around the slot is intense, and you typically need a few board thicknesses' clearance -- around signal traces to ground edges, and between ground edges themselves -- to get adequate attenuation of those fields. You can waste a *lot* of space using a slot properly -- much more than you would spend with cleverer placement and routing.
Likewise, thinking in terms of magnetic fields or transmission lines/waveguides (depending on impedance and frequency range), the proposed method is likely ineffective or worse: you're still projecting those fields (from top/mid signals, and around the peninsula) into the otherwise-unbroken plane. Which is to say one of the points from earlier: if you'd left both planes whole and stitched them, you'd have lower ground impedance than by splitting and cutting them up -- less ground-loop voltage due to currents in the local area.
But again, without knowing what's routing on top of it -- no idea which of these (and many more) factors is most relevant. I could imagine some scenarios where such a construction is worthwhile, but it's mostly going to be at LF/DC, and there are probably better ways to design that, too.
As for Altium, in the event where all these checks pass and I do in fact need such a structure -- I would reach for a net bridge, yes. Otherwise you'd doing tedious hackery like cut-outs stacked on vias, or worse using weird polygon settings/rules (like "Don't pour over same net objects") or worst of all un-repoured polygons, to implement it.
Note you can use place-on-layer for a copper-only (use tented SMT pads) footprint and thus tuck the net bridge onto a mid layer; it doesn't have to be surface only.
Tim