Surely it is as easy as in DipTrace where you simply right click on the pin & selected "unconnected". A small cross is then placed on the pin so it is obvious.
Almost as easy. Type P, V, N first, then click the pins desired.
FYI to the OP:
ERC (Electrical Rules Check) is a tool that you use to help verify the correctness of your design. For example, to avoid driving outputs from other outputs, or to leave inputs hanging (the case here).
It is specific to digital logic designs.If you design is not helped by such a tool, you may consider simply disabling it under Project Options. (You can set the error condition from error to warning to disabled, as you wish.)
In analog designs, it is typically a hindrance: most of the pins are usually passive type (ignore ERC) to begin with, or at the very least, bidirectional -- not in the digital / ERC sense, but literally, that the current and voltage may flow with either polarity. There can be no use in arbitrarily assigning transistor collectors and emitters as inputs and outputs, when they are used for both.
Analog designs are usually small, and so they can be manually verified on design review.
Analog designs, built with hierarchical design methods, can use ERC rules on sheet symbols. This is good for, for example, an op-amp filter subcircuit, where the output connectivity follows the same rules as digital outputs.
There's honestly not that much value in ERC anymore, as nobody does large digital logic designs by hand. That checking is handled, by and large, by the FPGA synthesizer. You might still find value in ERC for connecting up such a design, though (making sure there's no crossed wires between, say, the IO bank and the SDRAM and peripherals).
Tim