Selectively Plug Vias With Soldermask

[Paul4Liberty]

Sometimes I need to selectively plug vias with soldermask to avoid capillary action.

I've come up with my own technique but wanted to see if anyone else has a better/easier way. My idea is to break up a region on the solder mask layer into strips, and add semicircle cut outs at via sites. I use a mechanical layer to define the strip shapes, then convert the primitives to a region on the solder mask layer (I use shortcut Alt-T V E to speed things up). Attached are images of a QFN with this technique applied.

Has anyone found a better/easier way?

[asmi]

I started using via in a pad since the tech became available at JLCPCB, which solves this problem for good with no need for workarounds.

[Kean]

Maybe I misunderstand, but can't you just set negative solder mask expansion (contraction) or enable tenting for those vias on just the back side of those footprints/components

https://www.altium.com/documentation/altium-designer/pads-vias#!solder-and-paste-mask-expansions

[T3sl4co1l]

You can't: the pad mask takes precedence.  Objects on a layer are logical-OR.  Redrawing the mask is the only way, AFAIK.

AFAIK, this method is frowned upon because the added soldermask height may worsen solderability, and voids are left which weaken the solder joint.  Thermal conductivity is also a little poorer, which won't matter for a small chip like this, but may matter in some cases.

But it's a compromise whether to use via-in-pad (plugged / plated-over vias), tented (like this), or plain vanilla (hope the wicking isn't too much).

It's my experience at least, that small vias (<= 0.3mm ID), and especially in lead-free process, don't wick very quickly.  There's also some excess solder capacity in the pad, which can (should, even?) be wicked up.  This can be countered by reducing the paste mask or making a checkerboard pattern, but less reduction plus vias can be used to the same end.

Tim