Don't use a "power plane", that's a holdout from archaic tools, I'm pretty sure. Altium still supports that type of design, but the options are very limited.
Configure the inner layers as "signal" and use polygon pours to connect the supply nets. This gives you relative freedom in design (routing and shape), without having to do bizarre cutouts and stuff, and you get polygon design rules.
You almost always want the top inner layer to be solid GND. Exceptions might include, slots to isolate noisy and sensitive sections (use with caution), or sections that are completely isolated.
The bottom inner layer can then be whichever supplies are best. If signal quality is not a concern, you might not even bother with pours, and use it as a third routing layer instead (providing space for more signals, as well as routed power).
The most common approach is to use pours extending under the areas where each supply net is dominant. So, under your... whatever is using 1.2V (FPGA? DSP?), you at least want that extending underneath, and over to whichever pins are connecting to it. But immediately around that pour, you need 3.3V for the VCCIO connections (or whatever), so you need that wrapping around. Over in the analog section, you might use 5 or 12V as the pour.
If the 5V is only an intermediate, not used for anything else, then it certainly doesn't need to be routed elsewhere on the board. Keep it confined to the power supply section. Or, if you have just a few uses of it, it can be routed on the top or bottom as a normal signal, where it won't disturb the inner layers.
If you do wind up putting traces on inner layers, mind the negative space around those traces. Everywhere there's a trace, there's no pour, but rather a slot in it. Slots resonate at high frequencies, and below resonance, appear as increased inductance. These can be stitched over, just as you would do ground stitching on a two layer board, but the advantage of a 4-layer board is to avoid stitching in the first place, so try to avoid the need for that.
If your board is relatively low density, you can achieve even higher copper density, and therefore less ground loop voltage drop and better shielding, by pouring ground (or another convenient, well-bypassed supply) on the top and bottom layers, too. These will need to be stitched to be effective.
Tim