Power supply topology for 150kV

[MagicSmoker]

...
Just need to dig deeper into the atmel ADC so I can get past the arduino IDE limited 10bit and get the 11bit to match my output.

I figure 11 bit should be good enough?

10b = 1024 steps, or <150V per step if you want to adjust the output from 0-150kV; over a more restricted range of 50-150kV that's <100V per step. Generally speaking, a step size of 500V would not be unusual for this high a voltage, so I'd say you have more than enough granularity with 10b.

But, you should know what your x-ray tube needs better than us. Or me, anyway.

[james_s]

Generally a step size of 5kVp is adequate for most xray imaging, and 150V would be ridiculously fine. I'm sure there are specific applications where greater precision may be needed though.

[BootstrapBill]

The inductor required by the buck converter takes over the (current) averaging function of the secondary side inductor in a conventional forward-type converter (of which the full bridge is one variant). You can also delete the buck output capacitor (aka - bridge input capacitor) if you run the bridge legs with a slight overlap; this makes the bridge current-fed, instead of voltage fed, and has some significant benefits as far as switching losses and robustness to short circuits. Some overlap of the bridge leg conduction time is critical for the current-fed variation because you don't want to interrupt current through an inductor, but since the bridge isn't width-modulated you can usually rely on the IGBTs turn-off delay to ensure a bit of overlap when driven at 50% duty cycle.

As for secondaries in series, yes, that is one of the many "appropriate construction techniques" I was alluding to (along with vacuum varnish impregnation, quad insulated wire, etc.). Each secondary only needs to withstand the voltage difference across it, then. And as others have mentioned, you won't be able to process this amount of power with a single core, anyway. Which reminds me, you probably want to use UU cores to achieve maximum separation of the windings (at the expense of increased leakage inductance).
[/quote]

I am at the point where I am actually going to construct the Buck portion. I have access to many caps of both the ceramic and electrolytic variety. I was going to have an output capacitor stage so I can test one stage at a time. I am aware that I will need a many caps in parallel to withstand the current ripple of the inductor.

Would there be any negative effects of leaving this cap stage in there?

Would there be any positive effects?

A 10+ stage multiplier on the other side of the transformer isn't exactly a large value output cap..

And most importantly can you be more specific with the overlap?

[MagicSmoker]

I am at the point where I am actually going to construct the Buck portion.
...
Would there be any negative effects of leaving this cap stage in there?

Would there be any positive effects?

In this particular application the main downside of leaving the buck-output/bridge-input capacitor in is the cost/volume of such, though it won't be anywhere near as costly/big as the input capacitor for a width-modulated full bridge (because each bridge leg will be operated very close to 50% duty so it will draw a nearly constant current from the capacitor). Otherwise, there are two other major downsides to the buck voltage-fed bridge, of which only one is relevant here: 1) no intrinsic tolerance of a short on the secondary (irrelevant because the C-W multiplier presents a high impedance load even with its output shorted);  much higher turn-on loss in the bridge switches due to bridge input capacitor ensuring voltage remains nearly constant across the switches during the entire turn-on transition, exacerbated by reverse recovery of the anti-parallel diodes because during the dead-time some or all of the primary current will have transitioned to them.

A 10+ stage multiplier on the other side of the transformer isn't exactly a large value output cap..

And most importantly can you be more specific with the overlap?

Hmmm... a 10 stage C-W multiplier is going to have terrible voltage sag and very high ripple under load. Dave, our fearless leader here, did a very good video on C-W multipliers and I encourage you to pay particular attention to the last few minutes where he tests a 4 stage (x8) multiplier under load:

(I guess youtube embedding tags don't work here?) [edit - I guess it does; didn't show up as embedded when I previewed my post...]

Remember, there's no such thing as a free lunch so if you want, say, 150kV at 1A from a 10 stage multiplier you will need to theoretically feed 20A at 7.5kV into the first stage (realistically you will have to feed a lot more that 7.5kV because of voltage sag). You can reduce voltage sag by making the capacitors in the first stage n times bigger than the capacitors in the final stage, where n is the number of stages (edit: and making the capacitors in the 2nd stage n-1 times bigger, etc.), and by using a center-tapped secondary and mirroring a second C-W multiplier on the other leg, which turns this into a full-wave multiplier with the center-tap as the negative output reference. Actually, I should emphasize this much more clearly: you pretty much have to use a full wave multiplier at this power level.

The overlap time for the bridge switches in the current-fed version is not too critical. A somewhat fast-n-loose approach which nevertheless tends to work well with IGBTs (not MOSFETs!) is to simply drive each bridge leg with a straight 50% duty complementary square wave, relying on the turn-off delay time of the IGBTs to ensure there is some overlap. There is a dedicated PWM controller IC for buck voltage- or current-fed push-pull converters, the LM5041, which lets you select between overlap or dead-time of the push-pull switches; it is very easy to adapt this IC to a full-bridge converter.


edits - additional info; removed erroneous reference to poor transformer utilization (due to my misinterpretation of the half-wave ripple from a C-W multiplier automatically meaning it was a half-wave rectifier, though it is actually full-wave).

[T3sl4co1l]

FYI, the only thing that's half-wave about a CWM is the output ripple; the input is always fully utilized.

7.5kV at 20A sounds quite nice for winding the transformer: it's only 375 ohms, so it will be quite reasonable to achieve low leakage inductance.

Tim

[james_s]

Some years ago I reverse engineered a Kodak dental xray head and it used a ferrite transformer with a C-W multiplier and closed loop feedback for the HV. It was only about 600W but the principal should be scalable. https://www.repairfaq.org/sam/xraysys.htm#xraytro

[MagicSmoker]

FYI, the only thing that's half-wave about a CWM is the output ripple; the input is always fully utilized.

Huh, you're right. I had to simulate it in LTSpice before I believed you because no matter how I look at it I can't see how it wouldn't act as a half-wave rectifier and, indeed, the half-wave ripple only corroborated that analysis. So, learn something new every day...

[T3sl4co1l]

It's like that thing Jesus said, but opposite.  In this case, if you take it on faith, that's fine, but actually testing it to prove it's true, that way lies the path to righteousness.

Tim

[BootstrapBill]

Dude at VMI told me to stay away from full wave. He said it would be too hard to control. I didn't ask but now I'm wondering what he meant by that. Also told me only way to get output reference was to string a voltage divider from output to ground.

I'm basically going to be spending a lot on HV capacitors to maintain smooth output. They get quite expensive outside of the nF range

[MagicSmoker]

Generally a step size of 5kVp is adequate for most xray imaging, and 150V would be ridiculously fine. I'm sure there are specific applications where greater precision may be needed though.

I didn't explicitly state this in my previous post - and then got sidetracked by Tim with the C-W stuff - but the main reason for wanting the ADC monitoring the output voltage to have a finer step size than is strictly necessary is to avoid/minimize limit cycle oscillations, a phenomenon in sampled data systems where the output value oscillates between two steps because the reference value has been set to something between them. This applies to the digital pulse width modulator (dPWM) as well - it needs to have an even finer step size than the ADC.

You can employ some fairly heavy math to determine just how much finer the ADC and dPWM step sizes need to be, but I tend to categorize such as "getting a really precise answer to a hopelessly imprecise question"; ie - of dubious utility. In my experience, simply going with +2b higher resolution for the ADC and another +1b for the dPWM is sufficient. E.g. if there are 256 (8b) output voltage steps then a 10b ADC and an 11b dPWM will usually suffice.

Dude at VMI told me to stay away from full wave. He said it would be too hard to control. I didn't ask but now I'm wondering what he meant by that. Also told me only way to get output reference was to string a voltage divider from output to ground.

I'm basically going to be spending a lot on HV capacitors to maintain smooth output. They get quite expensive outside of the nF range

Yeah, I'd ask for clarification on that full-wave comment; it doesn't make any sense as-is.

There are non-contact means of measuring DC voltages, but they are quite coarse/imprecise and subject to influence from static, high dV/dt waveforms (you know, like the kind produced by switchmode power supplies... ahem), so, yes, a resistor voltage divider on the output will be necessary.

But if you are concerned about the cost of capacitors you might be surprised at just how expensive this simple voltage divider will be... For example, to scale 150kV down to 5V with a 10k output impedance the upper resistor in the divider needs to be 300G (that's 300 gigaohms) and it will dissipate a maximum of 75W. Practically speaking, that means a whole lot of resistors in series to achieve the necessary resistance and power rating, while also avoiding errors due to voltage coefficient (ie - resistance value change with voltage). One possible solution would be 60 5G/2.5W Ohmite Mini-Mox resistors in series, at a cost of $5 each.

So, yeah, ain't nothin' cheap 'bout a 150kV regulated power supply.

[BootstrapBill]

I didn't explicitly state this in my previous post - and then got sidetracked by Tim with the C-W stuff - but the main reason for wanting the ADC monitoring the output voltage to have a finer step size than is strictly necessary is to avoid/minimize limit cycle oscillations, a phenomenon in sampled data systems where the output value oscillates between two steps because the reference value has been set to something between them. This applies to the digital pulse width modulator (dPWM) as well - it needs to have an even finer step size than the ADC.

You can employ some fairly heavy math to determine just how much finer the ADC and dPWM step sizes need to be, but I tend to categorize such as "getting a really precise answer to a hopelessly imprecise question"; ie - of dubious utility. In my experience, simply going with +2b higher resolution for the ADC and another +1b for the dPWM is sufficient. E.g. if there are 256 (8b) output voltage steps then a 10b ADC and an 11b dPWM will usually suffice.

Thanks, function of the feedback was what I was getting at with resolution, not achievable voltage steps.

So after reading over the Pressman buck current-fed bridge portion it seems they are well suited for multipliers. I now understand the overlap and like the idea of not blowing $100+ from possible shoot through. It states the frequency must be 2x for the buck portion. I wanted something well out of the audio range and the magnetics company was pushing me towards 40kHz. Not sure you can do 80kHz with an IGBT brick.

Also any thoughts of the voltage-fed buck capacitor? Could I get away with a smaller value or do I need to maintain less than 1% ripple.

Thanks

[MagicSmoker]

...
So after reading over the Pressman buck current-fed bridge portion it seems they are well suited for multipliers. I now understand the overlap and like the idea of not blowing $100+ from possible shoot through. It states the frequency must be 2x for the buck portion. I wanted something well out of the audio range and the magnetics company was pushing me towards 40kHz. Not sure you can do 80kHz with an IGBT brick.

Also any thoughts of the voltage-fed buck capacitor? Could I get away with a smaller value or do I need to maintain less than 1% ripple.

If there is just one buck switch then, yes, it is best to run it at twice the switching frequency of the bridge switches (so that each bridge leg gets a pulse from the buck). However, it is much more common to split the buck stage into two interleaved (ie - phase shifted) channels running at the same switching frequency as the bridge.

Your switching frequency target of 40kHz for the bridge is totally unrealistic. Maybe if you use SiC MOSFET modules ($$$) or go with a soft-switched or series resonant converter (both of which are more complicated and therefore more difficult to get working reliably) you can run a 100kW offline converter at 40kHz, but in a typical hard-switched converter the practical upper limit on switching frequency is when switching losses reach parity with conduction losses, and that will be around 10kHz with current generation 600V IGBT modules.

As for sizing the buck output/bridge input capacitor, the conservative approach is to design it for either application; ie - assume no ripple current cancellation from the bridge sucking charge out of it at the same time the buck is dumping charge into it.

[T3sl4co1l]

FYI, at a PPoE, we were doing >50kW per IGBT brick, with derating above 30kHz or so.  This was 5 years ago, but the transistors were part of the then-20-year-old legacy design.  Our replacement design was expected to deliver slightly less power per module, with no derating to about double the frequency (i.e., ~40kW to 60kHz).

The protection circuit I designed (at first for the old transistors, but aimed towards easy integration of the new modules) was capable of protecting the transistors from complete short circuit events.  We measured a short circuit peak of 6kA for 3us, with the transistor surviving the event.

The legacy generation had no protection circuitry whatsoever, and IGBT bricks grenaded on a regular basis.

I do not use "grenaded" lightly.  Arc flash inside an IGBT module propels shrapnel.

Again, considerations like these are myriad, and the OP has shown absolutely no competence towards necessary protective features like this.

Certainly not with an Arduino.

We used an FPGA to implement a centralized controller architecture.  I would've preferred solving it with discrete logic, distributed among the gate drive modules, and an analog controller, but an FPGA is tolerable.

We burned very few transistors due to controller errors, even throughout early development.

An ATmega (the heart of the most common Arduino) would be suitable for setting the analog controller's setpoints, but obviously not Arduino code, which is terrifying just for making LEDs blink.  Arduino is utterly and appallingly unsuitable for any serious application like this.

And if one does not understand why this is the case, one should most definitely not be attempting anything more than blinking LEDs, at this point in their career.

Tim

[BootstrapBill]

So I was hoping to use these..

http://www.infineon.com/dgdl/Infineon-FZ400R12KS4-DS-v03_04-en_de.pdf?fileId=db3a304412b407950112b4336f045caa

After switching these at 40kHz (have a bunch laying around) I can see that it is in fact unrealistic. Very square at 20kHz however.

http://www.pwrx.com/pwrx/docs/cm300ha24h.pdf

Yes I would not attempt to use an Atmega. The DUE has a 32bit atmel processor.

[MagicSmoker]

FYI, at a PPoE, we were doing >50kW per IGBT brick, with derating above 30kHz or so....

Hmm... and what was the datasheet rating for these (presumably half-bridge) bricks?

So I was hoping to use these..

http://www.infineon.com/dgdl/Infineon-FZ400R12KS4-DS-v03_04-en_de.pdf?fileId=db3a304412b407950112b4336f045caa

After switching these at 40kHz (have a bunch laying around) I can see that it is in fact unrealistic. Very square at 20kHz however.

Infineon makes some pretty fast 1200V IGBT dice, arguably the best based on current vs. switching losses, though Fuji has made some impressive progress over the last few years; Powerex (Mistubishi), in contrast, has about the slowest IGBT dice, and seems to be more concerned with the medium voltage (ie - 1700V to 4500V) market.

Since you already have a bunch of the above modules you might as well use them, especially if the incoming supply will be rectified 480VAC (ie - a DC bus of ~680V). Since they are rated for a lot more current than you will need you should even be able to run them at 20kHz, though switching losses will be about 4x higher than conduction loss at that point. Note, however, that at 30kHz the ratio of switching losses to conduction will be ~6x, while at 40kHz the ratio jumps to ~10x! At some point the increasing volume/complexity of the heat removal system required to run the modules at higher and higher frequencies will outweigh the volume reduction in the transformer. And not to point out the obvious here, but higher switching losses = lower efficiency.

As for an Arduino (regular or Due), the problem with these platforms is that they do not guarantee an interrupt service latency time, which can be downright disastrous in applications which require consistent timing and fast response to changing conditions, like controlling the state of the switches in an 100kW inverter...

I also agree that you should obtain some professional help if for no other reason than to save you a lot of time/money building stuff that has no chance of working. I'm not going to give you a safety lecture - either you are a responsible adult who knows his limitations, or you'll be losing the proverbial eye, likely from exploding IGBT modules...

[Marco]

The GAN MOSFET I mentioned before will burn something around 100 mW on the gate drive at 100 kHz and switches in 10 ns ... what's the point in messing about with IGBTs?

PS. just to point out the obvious, you're also going to have to make or buy a PFC.

[Richard Head]

GaN MOSFETs are twice the price of IGBT's and their anti-parallel diode has a Vf of around 6v which is horrendous. IGBT's give good value for money at present (until they are toppled by GaN in a few years maybe).
I'm really surprised no one has seriously considered a series resonant topology such as LLC for this application. You can use IGBT's at a much higher frequency than if they are hard switched. The leakage inductance (which is huge due to the isolation requirement) can be lumped into the resonant inductor and you need no output inductor. Also EMI is almost non existent compared to a hard switched converter.
The dynamic range issue can be a problem but there are ways around that also. The transformer doesn't see any high frequency ringing currents which often plague high power switched converters causing them to run hotter than expected. It's nirvana from all angles! 

[Marco]

GaN MOSFETs are twice the price of IGBT's and their anti-parallel diode has a Vf of around 6v which is horrendous.

They say 1.9V at 32A for the one I linked earlier, the datasheet for the hugely oversized brick IGBT he wants to use suggests it would manage 1.5V ... meh. Not unimportantly the GaN MOSFET's datasheet also claims a reverse recovery charge of bugger all. Going to need a IBGT with a SIC diode to compete with that, there goes the price advantage.

For a one off I don't see why you wouldn't just go with whatever makes your life easiest.

[Richard Head]

GaN MOSFETs are twice the price of IGBT's and their anti-parallel diode has a Vf of around 6v which is horrendous.
Apologies. Re-checked my data and that's bullshit. Vf is not 6V.
SiC is also an option. See attached Semikron device.

[T3sl4co1l]

GaN and SiC are excellent ideas.

Their different drive requirements and performance specs will keep the OP blowing transistors, and burning budget, instead of burning humans.

Tim

[Marco]

It's not like he can drop in some datasheet/white-paper solution any way. It's all custom.

Having a FWD which behaves closer to an ideal diode makes life easier. Having a switch which behaves closer to an ideal switch makes life easier. IGBTs with silicon FWDs, not so much.

PS. though I think he should just ask for a quote from SK Electrics, since they already sell a high frequency high voltage transformer in the ballpark of his spec. At 23 kg it seems well designed too.

[MagicSmoker]

The GAN MOSFET I mentioned before will burn something around 100 mW on the gate drive at 100 kHz and switches in 10 ns ... what's the point in messing about with IGBTs?

PS. just to point out the obvious, you're also going to have to make or buy a PFC.

Yes, let's switch 340V in 10ns across the primary of a 10-15kV output transformer... What Could Possibly Go Wrong? Hint - stray and distributed capacitances. Also, RFI...

And the OP is in the US so PFC is not necessary, nor would it even be desirable unless he's approaching the maximum usable VA of his service drop and/or the utility applies a penalty for poor power factor (usually only done to industrial and larger commercial customers).

GaN and SiC are excellent ideas.

Their different drive requirements and performance specs will keep the OP blowing transistors, and burning budget, instead of burning humans.

 

Especially GaN switches... those things seem to break out into destructive oscillation just by looking at 'em funny.

[T3sl4co1l]

Especially GaN switches... those things seem to break out into destructive oscillation just by looking at 'em funny.

Hell, I had a Si SuperJunction type singing at up to 400MHz the other day!

Ferrite beads are a wonderful thing

Tim

[Marco]

Yes, let's switch 340V in 10ns across the primary of a 10-15kV output transformer

Hard switching at 30 kW seems a bit silly period, do you really want to burn a couple kW in the switches?

Any way, there's the switch and the diode. You'd rather the diode switch off instantly when reverse voltage is applied, with only capacitive losses, instead of having a silicon diode snap off near instantly after allowing significant reverse current to build up if you happen to drive it just right/wrong.

[SeanB]

Any way, there's the switch and the diode. You'd rather the diode switch off instantly when reverse voltage is applied, with only capacitive losses, instead of having a silicon diode snap off near instantly after allowing significant reverse current to build up if you happen to drive it just right/wrong.

Well, it will do that for at least a half second before it either turns to smoke, or smoke, flame and loud noise. Depends on the diode, and what you consider to be significant current.